Monday, August 31, 2015

How A JFET Works 

click for animated diagram Watch it work with an interactive diagram

Using the Animation

Start by clicking and dragging up, either of the handles on the VGS or VDS voltage sliders. This applies appropriate voltages to the JFET. Watch the "What´s Happening" box for information about the transistor´s operation as you adjust the VGS and VDS sliders.
The VDS control changes the voltage across the drain and source, which sets up a voltage gradient to attract electrons from the source to the drain, creating a drain current ID. Notice how the initial increase in current stops rising once the pinch off point is exceeded. The increase in current normally caused by an increase in applied voltage is approximately balanced by the increase in resistance of the conducting channel, caused by the growth of depletion layers around the gate regions. This is due to a reverse bias on the gate PN junctions caused by the P type gate being at a lower voltage than the N type channel (especially nearer the positive Drain end) as the drain becomes more positive.
With VDS in the saturation area and VGS at zero volts, maximum current is flowing. This current can be reduced to zero just by increasing the negative gate−source voltage VGS to narrow the conducting channel. As the Gate−channel junction is reverse biased, the JFET controls a large drain current by using a changing voltage on the gate with practically no gate current. The advantage of a JFET is that, although it´s gain (it´s FORWARD or MUTUAL TRANSCONDUCTANCE) is not very high compared with some other devices; because there is no gate current, the input impedance is extremely high. Also unlike a bipolar transistor the current does not have to pass through any PN junctions (which in effect are small capacitors), therefore the JFET high frequency performance is very good.

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